TSMC expands 3nm capacity across 3 sites to meet surging AI demand

TSMC is racing to build 18 new chip factories worldwide as AI demand consumes every available wafer.

TSMC's 3nm capacity expansion across Taiwan, Arizona and Japan comes as AI chip demand has burned through every available wafer, with advanced packaging supply trailing even further behind.

"We are seeing unprecedented demand for our 3nm technology driven by AI accelerators," C.C. Wei, chief executive officer at TSMC, said. "The shortage extends beyond wafers to advanced packaging, which remains our tightest bottleneck."

The company is building 18 new fabrication facilities globally, its largest capacity expansion in history. TSMC's 3nm node — which delivers roughly 15% faster logic speeds and 30% lower power consumption than its 5nm predecessor — serves as the primary process for Nvidia's Blackwell and AMD's MI300 series AI accelerators. The expansion spans three continents: new fabs in Arizona and Kumamoto, Japan, complementing existing capacity at the company's Taiwan headquarters.

The capacity buildout positions TSMC to capture a growing share of the AI semiconductor market, though execution risk across three geographies and a tight timeline for CoWoS (chip-on-wafer-on-substrate) packaging expansion remain key challenges. Advanced packaging lead times have stretched beyond 12 months as demand for HBM (high-bandwidth memory) integration outpaces supply.

The 3nm Bottleneck and the Packaging Gap

TSMC's 3nm capacity cannot expand fast enough to satisfy demand from Nvidia, AMD, and a growing roster of custom AI chip designers including Amazon's Annapurna Labs and Google's Tensor team. The company's CoWoS advanced packaging capacity — which stacks logic dies alongside high-bandwidth memory — has been sold out for consecutive quarters.

Samsung Foundry has struggled to win major AI chip orders at 3nm, while Intel's foundry business has delayed its 18A node timeline, leaving TSMC as the sole high-volume supplier of leading-edge AI silicon. That near-monopoly position has driven significant investment, with the company spending tens of billions annually on capacity expansion.

Geographic Diversification and Execution Risk

TSMC's Arizona fab, initially delayed by labor shortages and permitting issues, is scheduled to begin 4nm production in 2026, with 3nm following in 2028. The Kumamoto facility in Japan, a joint venture with Sony, focuses on older nodes for automotive and image sensors, freeing up Taiwan capacity for advanced AI chips. The company is also evaluating a potential fab in Dresden, Germany, to serve European demand.

Each new fab costs $10 billion to $20 billion and takes three to five years to reach volume production. TSMC's ability to replicate its Taiwan manufacturing efficiency across multiple geographies will determine whether the capacity expansion delivers the returns investors expect.

TSMC's dominant position in AI chip manufacturing gives it pricing power and long-term revenue visibility, but the massive capital outlay required for geographic expansion introduces execution risk. If AI demand decelerates faster than expected, the company's capacity buildout could pressure utilization rates and margins.

This article is for informational purposes only and does not constitute investment advice.